About this role
Lead the definition and development of analog and digital AI accelerator system-level architectures for ultra-low power on-chip AI compute, translating product requirements into detailed specifications and system models. Collaborate across compute IP, processors, firmware, verification, and physical design teams while providing technical leadership and driving architecture exploration and implementation.
Skills for this role
Analog AI acceleratorsDigital AI acceleratorsSystem-level architectureSynopsys Platform ArchitectCompute IPProcessor architectureAccelerator designAnalog subsystemsDigital subsystemsFirmwareSystem interfacesDigital Signal ProcessingNeural-network compute architecturesAI workload mappingASIC designRTL developmentSystemVerilogSystemCVirtual prototypingPhysical design flowsDatapathsMemory hierarchiesInterconnectsUVMConstrained-random testingFunctional coverageAssertion-based verificationC programmingTechnical leadershipSoC architecture