New opportunity

Senior SLT Engineer

Advanced Micro Devices, Inc · Singapore

About this role

The Central Engineering Team at AMD is seeking a Senior System Level Test (SLT) Engineer to drive silicon bring-up, test program development, characterization, debug, and yield improvement for next-generation server and enterprise processors. This role bridges product development and manufacturing to ensure high quality, performance, and production readiness. You will work across CPU architecture, silicon design, firmware, and data analytics to shape test strategies and implement AI-driven engineering solutions. Responsibilities include: developing and optimizing SLT programs; driving silicon bring-up and failure analysis; utilizing data analytics and AI-assisted methodologies to enhance test coverage; creating scalable test frameworks; and mentoring engineers on best practices. Qualifications: BS/MS in Electrical Engineering, Computer Engineering, or related fields. Required experience includes prior work in Product Engineering, Test Engineering, or semiconductor roles, with strong programming skills in Python, Java, SQL, or Shell and Unix/Linux expertise. Preferred qualifications include hands-on experience with LLMs, AI Agents, and AI-driven automation, as well as familiarity with server platforms, PC hardware architectures, and cross-functional collaboration with Firmware, BIOS, and Silicon Design teams.

For full details about this role, click “Apply on company site” to view the employer’s original posting.

Skills for this role

System Level TestSilicon bring-upPythonJavaSQLShellUnixLinuxData analyticsAutomationLLMsAI AgentsMachine learningFirmwareBIOSHardware debug

Checking your profile…

Preparation suggestions, not the employer’s actual interview questions. Always check the original posting for current requirements.

Understand the role

What matters most

Silicon Bring-up and Debug
The role requires driving the end-to-end process from first silicon to high-volume manufacturing. You must demonstrate proficiency in characterization, failure analysis, and root-cause debugging of complex hardware issues, ensuring that new server processors meet performance and quality standards.
Test Program Development and Optimization
You are expected to develop and refine System Level Test (SLT) programs. This involves architecting scalable test frameworks and content strategies that bridge the gap between product development and manufacturing to ensure production readiness.
AI-Driven Engineering Integration
A key priority is the implementation of AI-assisted methodologies, including the use of LLMs and AI agents, to enhance test coverage, automate workflows, and improve data analytics for faster decision-making in a high-volume environment.
Cross-Functional Collaboration
You must effectively interface with Firmware, BIOS, Silicon Design, and Product Engineering teams. Success depends on your ability to communicate technical findings across these domains to resolve system-level challenges and influence product robustness.

Likely challenges to think through

Managing NPI Complexity
New Product Introduction (NPI) environments are fast-paced and high-pressure. The challenge lies in balancing the need for rigorous validation with the urgency of meeting production timelines. Prepare by highlighting your experience in managing trade-offs between test thoroughness and time-to-market.
Integrating AI into Legacy Workflows
While the role emphasizes AI-driven automation, integrating these tools into established semiconductor test infrastructures can be difficult. Be prepared to discuss how you would introduce AI agents or LLMs into existing pipelines without disrupting current manufacturing stability.
Debugging Across Heterogeneous Domains
Root-cause analysis often requires isolating issues that span hardware, firmware, and software. The difficulty is identifying whether a failure is silicon-related or a firmware/BIOS interaction. Prepare by detailing your systematic approach to cross-domain debugging and how you document findings for global teams.

Practice your answers

Technical practice

System Level Test (SLT) Strategy

What to coverExplain your approach to developing an SLT program for a new server processor. Focus on how you balance test coverage, cycle time, and the need to catch silicon-level defects that might be missed by traditional ATE (Automated Test Equipment).

Silicon Bring-up and Debug Methodology

What to coverDescribe your systematic process for silicon bring-up when encountering a failure during initial power-on. Discuss how you isolate issues between hardware, firmware, and BIOS, and what specific tools or logs you prioritize.

AI-Driven Test Automation

What to coverHow have you integrated AI or machine learning into your test workflows? Provide an example of how you might use AI agents or LLMs to analyze large datasets from manufacturing to identify yield limiters or optimize test sequences.

Data Analytics in Manufacturing

What to coverDiscuss your experience using SQL or Python to analyze high-volume manufacturing data. Explain how you use this data to drive yield improvement and make data-backed decisions regarding product readiness.

Cross-Functional Debugging

What to coverWhen a failure is identified in the field or during NPI, how do you coordinate with Firmware, BIOS, and Silicon Design teams to perform root-cause analysis? Highlight your process for communicating technical findings across these different domains.

Scalable Test Frameworks

What to coverDescribe your experience in architecting or maintaining scalable test frameworks. Focus on how you ensure the framework remains maintainable and efficient as you transition from NPI to high-volume manufacturing.

Server Platform Architecture

What to coverWhat is your familiarity with modern server platform architectures? Explain how you account for specific hardware constraints or dependencies when designing test content for enterprise-grade processors.

Scripting for Test Efficiency

What to coverProvide an example of how you have used Python or Shell scripting to automate a manual or repetitive task in a semiconductor test environment. Focus on the impact this had on productivity or test reliability.

Behavioural practice

Mentoring and Technical Leadership

What to coverDescribe a time when you mentored a junior engineer on complex debug techniques or test best practices. How did you tailor your guidance to help them grow while ensuring the project goals were met?

Managing NPI Pressure

What to coverNPI environments are often fast-paced with tight deadlines. Tell me about a time you had to prioritize competing tasks during a critical silicon bring-up phase. How did you manage expectations with stakeholders?

Influencing Technical Direction

What to coverGive an example of a time you identified a flaw in an existing test strategy or methodology. How did you advocate for a change, and what was the result of your proposed improvement?

Cross-Functional Collaboration

What to coverDescribe a situation where you had to resolve a disagreement with a cross-functional team (e.g., Firmware or Design) regarding the root cause of a silicon issue. How did you reach a consensus and move forward?

Sharpen your knowledge

Topics to prepare

System Level Test (SLT) Methodologies
Focus on the transition from NPI to high-volume manufacturing. Exercise: Review the lifecycle of silicon bring-up and identify how test coverage is optimized at the system level versus wafer/package level. This is critical for the role's core responsibility of ensuring production readiness for server processors.
Silicon Bring-up and Failure Analysis
Understand the root-cause debug process for complex hardware issues. Exercise: Create a structured debug flow for a hypothetical silicon failure, incorporating cross-functional inputs from firmware, BIOS, and hardware design teams. This is essential for the role's focus on yield improvement.
AI-Driven Engineering Workflows
Explore the application of AI agents and LLMs in semiconductor testing. Exercise: Propose a conceptual framework for using an AI agent to automate the analysis of large-scale test logs to identify patterns in silicon failures. This aligns with the company's interest in AI-assisted methodologies.

Skills to revise

Python for Test Automation
Develop scalable test scripts. Exercise: Write a Python script that parses a simulated hardware error log and categorizes failures based on predefined criteria. This is a primary requirement for developing and optimizing SLT programs.
Unix/Linux System Proficiency
Master command-line operations for test infrastructure. Exercise: Practice writing Shell scripts to automate the deployment of test configurations across multiple server nodes. This is necessary for managing the test environment and scalable frameworks.
Data Analytics for Yield Improvement
Utilize SQL or data processing tools to extract insights from manufacturing data. Exercise: Design a SQL query to correlate specific test parameters with yield loss across different silicon batches. This is vital for the role's objective of driving yield improvement.

Your preparation checklist

Review Silicon Bring-up and Debug Methodologies
Prepare to discuss your experience with the full lifecycle of silicon bring-up, from initial power-on to high-volume manufacturing. Be ready to explain specific root-cause analysis techniques you have used to resolve complex hardware, firmware, or BIOS-related issues.
Prepare Examples of AI-Driven Test Automation
Draft a summary of how you have utilized Python, SQL, or Shell scripting to automate test frameworks. Specifically, highlight any experience integrating AI agents or LLMs into your workflow to improve test coverage, data analytics, or debugging efficiency.
Map Experience to Server and PC Architecture
Review your background in server platforms and PC hardware architectures. Prepare to explain how your knowledge of these systems has informed your test strategy and helped you bridge the gap between silicon design and production readiness.
Develop a Technical Leadership Case Study
Prepare a concrete example of a time you mentored junior engineers or influenced a technical direction within a cross-functional team. Focus on how you promoted best practices in test engineering and data-driven decision-making.
Formulate Strategic Questions for the Interviewers
Prepare thoughtful questions regarding the team's current approach to AI-assisted test workflows, the specific challenges of the next-generation server processors you would be testing, and how the Central Engineering team collaborates with BIOS and Firmware groups.

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