New opportunity

Sr. SW Test Engineer - Neural Library (5-8 years)

Sandisk · Bengaluru, India

About this role

Sandisk is seeking a Sr. SW Test Engineer - Neural Library to validate neural network operators and libraries for a next-generation AI computational storage product. The role focuses on ensuring the correctness, performance, and robustness of compute kernels deployed on advanced hardware platforms on-site at the Bangalore PTP Office (IBP).

Responsibilities

  • Validate neural network operators (matmul, convolution, attention, etc.) for correctness using reference models
  • Develop automated tests for operator-level and graph-level validation
  • Perform numerical accuracy validation against frameworks like PyTorch or TensorFlow
  • Execute and maintain smoke and regression test suites
  • Benchmark and validate performance including throughput, latency, and scaling behavior
  • Build and maintain performance benchmarking frameworks
  • Perform software profiling to analyze execution bottlenecks
  • Conduct memory usage analysis and detect memory leaks
  • Identify issues across compiler, runtime, and kernel execution stacks
  • Debug failures across compute kernels, runtime APIs, and hardware execution
  • Collaborate with compiler, runtime, and hardware teams

Required qualifications

  • 4-6 years in AI/ML systems validation or performance testing (job title notes 5-8 years)
  • Strong C++ programming skills (mandatory)
  • Strong Object-Oriented Programming (OOP) fundamentals (mandatory)
  • Experience with Python for test automation
  • Strong understanding of deep learning operators and frameworks (PyTorch preferred)
  • Experience with numerical validation and floating-point behavior
  • Knowledge of parallel execution, memory hierarchy, and compute kernels

Preferred qualifications

  • Experience with profiling and debugging tools (perf, VTune, Nsight, etc.)
  • Experience with ML execution stacks (MLIR/XLA or similar)
  • Exposure to accelerator validation (GPU/NPU/FPGA)
  • Experience validating large language model workloads

For full details about this role, click “Apply on company site” to view the employer’s original posting.

Skills for this role

C++Object-Oriented Programming (OOP)PythonTest AutomationDeep Learning OperatorsPyTorchTensorFlowNumerical ValidationFloating-Point BehaviorParallel ExecutionMemory HierarchyCompute KernelsSoftware ProfilingperfVTuneNsightMLIRXLAAccelerator ValidationGPUNPUFPGALarge Language Models (LLMs) ValidationBenchmarkingMemory Leak Detection

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A focused preparation guide, built around this job’s responsibilities and requirements.

✦ AI-generated guide
Preparation suggestions, not the employer’s actual interview questions. Always check the original posting for current requirements.
01

Understand the role

What matters most

  • Neural Operator and Numerical Correctness Validation

    Validate deep learning compute kernels such as matrix multiplication, convolution, and attention against reference models in PyTorch or TensorFlow, ensuring strict numerical accuracy across floating-point representations and execution graphs.

  • Automated Test Framework and Regression Suite Engineering

    Develop and maintain scalable automated testing frameworks using C++ and Python to cover operator-level and graph-level behaviors, running smoke and regression test suites across system builds.

  • Performance Benchmarking and Compute Profiling

    Measure and validate execution throughput, latency, and scaling behavior across hardware platforms by profiling memory hierarchies, identifying compute bottlenecks, and diagnosing memory leaks.

  • Cross-Stack Failure Triage and Hardware Co-Verification

    Isolate and debug kernel failures spanning the compilation stack, runtime APIs, and physical hardware execution environments, working in close collaboration with compiler and architecture teams.

Likely challenges to think through

  • Disentangling Failures Across the Compiler, Runtime, and Kernel Layers

    A numerical inaccuracy or crash may stem from compiler graph rewrites, runtime dispatch anomalies, or low-level kernel memory access bugs. Prepare by practicing structured isolation techniques: dumping intermediate representations, running standalone kernel unit tests with fixed inputs, and verifying reference tensors step-by-step.

  • Balancing Floating-Point Drift Against Strict Numerical Tolerances

    Hardware-optimized kernels may execute arithmetic out-of-order or use specialized precision modes, leading to acceptable minor drift that can easily trigger false-positive test failures. Prepare by reviewing standard tolerance metrics (such as relative vs. absolute tolerance thresholds like atol/rtol) and understanding IEEE floating-point behavior across custom hardware versus reference frameworks.

  • Isolating Microarchitectural Bottlenecks in Custom Computational Storage

    Profiling custom accelerator kernels involves subtle memory-bound and compute-bound interactions that standard off-the-shelf CPU profilers cannot fully decode. Prepare by reviewing hardware profiling methodologies (such as roofline models, VTune, and Nsight) to demonstrate how to pinpoint memory hierarchy stalls, bandwidth limitations, and execution latency.

03

Practice your answers

Technical practice

How do you validate numerical correctness of a custom neural network operator against a PyTorch or TensorFlow reference model?

What to coverSuggested practice question based on the role requirement for numerical validation and operator testing. A strong response should detail selecting absolute and relative tolerance thresholds (atol/rtol) based on data types (FP32 vs FP16/BF16), handling numerical drift from different accumulation orders, and validating corner cases like NaNs, infs, and zero tensors.

How would you architect an automated C++ and Python testing framework for operator-level and graph-level regression testing?

What to coverSuggested practice question based on the stated responsibilities for automated tests, C++, and Python. The candidate should discuss clean OOP design in C++ for execution drivers, Python bindings or scripting for test orchestration and parameterized fixtures, and integrating continuous smoke and regression test suites.

When a compute kernel produces non-deterministic numerical discrepancies, how do you debug and isolate the issue?

What to coverSuggested practice question derived from the requirement to debug failures across compute kernels, runtime APIs, and hardware execution. The candidate should explain systematic fault isolation: checking thread race conditions, parallel reduction order, shared memory bounds, floating-point precision modes, and verifying against CPU reference runs.

How do you measure and benchmark latency, throughput, and scaling behavior for neural network compute kernels?

What to coverSuggested practice question based on the performance benchmarking framework responsibilities. The candidate should address warm-up runs, timing overhead, cache flushing to prevent artificial hits, batch size scaling, and calculating roofline performance relative to peak theoretical hardware bandwidth and compute limits.

What profiling strategies and tools (such as perf, VTune, or Nsight) would you use to detect execution bottlenecks in an AI compute kernel?

What to coverSuggested practice question based on preferred profiling tools and execution bottleneck analysis duties. The response should cover identifying compute-bound versus memory-bandwidth-bound operations, analyzing cache miss rates and memory access strides, and interpreting instruction pipeline stalls.

How do you isolate whether a bug originates in the compiler transformation, runtime layer, or underlying compute kernel?

What to coverSuggested practice question based on the core duty to identify issues across the compiler -> runtime -> kernel stack. The candidate should describe inspecting intermediate representations (IR), dumping generated kernel code, validating raw runtime API payloads independently, and executing kernels directly with fixed inputs to bypass compiler optimizations.

How do you detect memory leaks and evaluate memory hierarchy utilization during sustained execution of a neural library?

What to coverSuggested practice question reflecting the responsibility for memory usage analysis and leak detection. The candidate should address using tools such as Valgrind or sanitizers (ASan/LSan), monitoring resident memory across long regression runs, and verifying alignment and buffer reuse across memory tiers.

What specific considerations and test strategies apply when validating large language model (LLM) workloads compared to standard CNNs?

What to coverSuggested practice question based on the preferred qualification in LLM workload validation. The candidate should discuss testing multi-head attention kernels, managing dynamic sequence lengths, key-value (KV) cache memory overhead, and numerical sensitivity in low-precision (INT8/FP8/FP16) matrix multiplications.

How do parallel execution models and hardware memory hierarchies impact kernel test design on accelerators like NPUs or GPUs?

What to coverSuggested practice question based on the required knowledge of parallel execution and accelerator validation. The candidate should discuss designing tests that stress warp/thread divergence, shared memory bank conflicts, memory coalescing, and synchronization primitives across parallel execution units.

Behavioural practice

Describe a scenario where you uncovered a critical failure that spanned across compiler, runtime, and hardware boundaries.

What to coverSuggested practice question aligned with cross-functional debugging duties. The candidate should use the STAR method to describe how they systematically isolated the defect, communicated diagnostic findings to compiler or hardware teams, and drove the resolution.

Tell me about a time you had to resolve a disagreement with development or hardware teams over whether an anomaly was a bug or expected behavior.

What to coverSuggested practice question addressing collaboration with compiler and hardware teams on numerical tolerances. The candidate should highlight their approach to presenting objective empirical data, assessing system-level impact, and reaching a consensus on acceptable precision or specification trade-offs.

Give an example of how you prioritized validation efforts and maintained regression test coverage under tight delivery schedules.

What to coverSuggested practice question based on maintaining smoke and regression suites in a senior role. The candidate should explain how they assessed risk to balance quick-turnaround smoke tests with comprehensive numerical sweeps and automated nightly regression pipelines.

Describe a situation where you identified a severe performance bottleneck or memory leak before code reached production.

What to coverSuggested practice question focused on profiling and memory analysis responsibilities. The candidate should detail the diagnostic tools they deployed, the root cause discovered in the compute kernel or runtime, and the measurable performance recovery achieved.

02

Sharpen your knowledge

Topics to prepare

  • Deep Learning Operator Semantics and Mathematical Formulations

    Relevance: Directly matches required qualifications and key responsibilities to validate neural network operators like matmul, convolution, and attention against reference frameworks. Exercise: Write down the formal mathematical tensor operations for scaled dot-product attention, 2D convolution, and matrix multiplication; define input/output dimensions and stride/padding handling.

  • Numerical Accuracy, Floating-Point Precision, and Error Drift

    Relevance: Matches required qualifications in numerical validation and floating-point behavior. Exercise: Analyze the differences between FP32, FP16, and BF16 representations, and calculate how out-of-order accumulation in parallel sum reduction introduces rounding variance compared to serial IEEE 754 reference execution.

  • Parallel Execution Models, Compute Kernels, and Memory Hierarchies

    Relevance: Explicitly required to assess compute kernels deployed on hardware platforms, memory usage, and execution bottlenecks. Exercise: Sketch the memory hierarchy of an accelerator (registers, shared/local memory, cache, DRAM) and trace data movement during a tiled matrix multiplication to explain memory-bound versus compute-bound limits.

  • Compiler, Runtime, and Hardware Stack Interactions

    Relevance: Aligns with the core duty to identify issues and debug failures across the compiler -> runtime -> kernel execution stack. Exercise: Map out the execution lifecycle of a tensor graph from high-level framework representation through intermediate representations (e.g., MLIR/XLA concepts) down to runtime dispatch and kernel launch on hardware.

Skills to revise

  • Test Automation in Python for Framework-to-Kernel Comparison

    Relevance: Explicitly listed as a mandatory qualification to perform numerical accuracy validation against PyTorch or TensorFlow. Exercise: Write a Python test script using pytest and torch.testing.assert_close (or numpy.allclose) that runs a parameterized convolution operator, compares output tensors against a golden reference, and checks atol/rtol bounds across edge cases like NaNs and infs.

  • C++ Object-Oriented Test Architecture and Harness Development

    Relevance: Mandatory requirement for strong C++ programming and OOP fundamentals to execute operator- and graph-level testing. Exercise: Design a modular C++ test harness using abstract base classes (e.g., OperatorValidator) with polymorphic execution methods to load reference weights, execute custom compute kernels, and verify memory layout.

  • Performance Profiling, Latency Benchmarking, and Bottleneck Analysis

    Relevance: Explicitly listed responsibilities to benchmark throughput/latency and perform software profiling using tools like perf, VTune, or Nsight. Exercise: Profile a C++ compute kernel using perf or VTune (or Nsight Compute for GPU if accessible); identify CPU/accelerator execution cycles, cache miss rates, and memory bandwidth utilization.

  • Memory Leak Detection and Resource Usage Tracking

    Relevance: Direct responsibility to conduct memory usage analysis and detect memory leaks across compute runtime APIs. Exercise: Run a C++ kernel driver through Valgrind (Memcheck) or AddressSanitizer/LeakSanitizer to identify unreleased tensor buffers, out-of-bounds writes, and memory fragmentation under repeated execution.

04

Your preparation checklist

  • Map Prior Experience to Stated Core Qualifications

    Draft a bulleted summary cross-referencing your direct background with the posting requirements: 4-6 years in AI/ML systems validation, production C++ and OOP design, Python automation, and deep learning framework verification.

  • Prepare an Operator Validation Project Walkthrough

    Structure a 5-minute technical case walkthrough describing how you tested a compute kernel (such as matmul or convolution), including reference model selection in PyTorch, establishing atol/rtol bounds, and handling floating-point discrepancies.

  • Build a Sample C++ OOP Test Harness Design

    Whiteboard or code a clean, modular C++ test harness structure using OOP principles (e.g., base test runners, parameterized fixtures, and tensor comparator utilities) demonstrating how to drive kernel execution and catch runtime API errors.

  • Document a Cross-Stack Debugging Case Study

    Outline a real-world troubleshooting scenario where you isolated a defect spanning the compiler, runtime API, or underlying hardware execution, emphasizing systematic triage steps and collaboration with adjacent engineering teams.

  • Draft Performance Benchmarking and Profiling Artifacts

    Summarize your hands-on methodology for latency, throughput, and memory leak analysis, noting specific profiling tools (such as perf, VTune, or Nsight) and metrics used to detect memory bandwidth or compute stalls.

  • Formulate Technical Questions for the Sandisk Engineering Team

    Prepare 3-4 insightful questions focused on the product domain, such as the architecture of the AI computational storage platform, specific target hardware accelerators (NPU/FPGA/ASIC), and the current compiler-to-runtime toolchain.

AI-generated from the job information · Prepared Nov 5, 2026 (UTC)Useful preparation, not a guarantee of eligibility or an offer.

Availability has not yet been verified. Status can change after a check; confirm on the employer’s website. Report an issue · Our checking policy

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